Seminars of Innovation and Research in Informatics

Social Presence is defined as the level at which a participant feels that he/she is with another person. In this project, virtual agents will be equipped with intelligence so that they will be able to hold a dynamic and rich conversation with the participants. The main goal is to check if the level of Social Presence increases compared to agents that are able to hold a poor conversation. The application will be developed in Unity and Oculus Quest 3.

Weekly research seminar that presents the latest results in Computer Graphics and Visualization and projects developed by the ViRVIG Group.

10:30 - 11:30

RISC-V, supported by sponsors Barcelona Supercomputing Center (BSC) and Openchip, is organizing an in-person hackathon on 20 January 2025 at the HiPEAC conference. This is a hands-on opportunity to dive into problem-solving using RISC-V based solutions, get access to great tools, and learn first-hand from experts.

The 'Aula Lliure' project is designed so that early stage bachelor students can take advantage of the academic experience of more veteran students and thus improve their academic performance. The tuition language is catalan / spanish. The 'Aula Lliure' project is designed so that early stage bachelor students can take advantage of the academic experience of more veteran students and thus improve their academic performance. The tuition language is catalan / spanish. Note: You must claim 1 ECTS when you teach 8 lectures (of 2h) to 1 group of students, for a total of 16h of lectures.

See the website

The 'Aula Lliure' project is designed so that early stage bachelor students can take advantage of the academic experience of more veteran students and thus improve their academic performance. The tuition language is catalan / spanish. The 'Aula Lliure' project is designed so that early stage bachelor students can take advantage of the academic experience of more veteran students and thus improve their academic performance. The tuition language is catalan / spanish. Note: you can claim 2 ECTS when, at least, you teach 8 lectures (of 2h) to 2 groups of students, for a total of 32h of lectures.

See the website

All human activities have implications on our society. Professional exercise in engineering, being a researcher or running innovation projects imply making decisions that are not exclusively technical, they involve ethical considerations. Theoretical sessions are complemented with numerous examples and cases.

Friday, 10:00-13:00

This course is an introduction to the statistical properties of languages and their origins, that are often related to the need to reduce the cognitive effort of speakers or listeners. The course is primarily relevant to anybody interested in how languages (and animal communication) are and why. In this course, students will learn about a myriad of statistical laws of language beyond the scope of traditional courses on information retrieval, how to analyze them and how to explain them based on general principles of (human) cognition. Students will learn about the mathematical and computational models that have been developed to explain these regularities. During this journey, students will enrich their current knowledge with concepts and tools from linguistics, biology, cognitive science, information theory and multidisciplinary physics. The course is also relevant for researchers interested in evaluating or adapting algorithms, machine learning methods,...based on the real statistical properties of language. As these regularities are often the result of reducing the cognitive effort of language users, the course is also relevant to researchers interested in developing resources or systems that are easier to use or understand by humans or in developing natural language processing tools that exploit the real constraints of the human brain. The webpage of the last edition of the course (to be updated) is found here: https://cqllab.upc.edu/courses/iql/ Depending on the number of participants, the professor may replace (upon approval by students) the labs and the research project by a single research project to be developed throughout the course. Important: to enrol in this course, please, email the contact person.

Tuesdays (08:00 to 10:00) and Thursdays (08:00 to 10:00)

TALENT ARENA is a space with more than 1,500 m2 of exhibition space, auditorium, workshops and sessions on Artificial Intelligence, Software Engineering, Data Science and Microchips. In addition, attendees will be able to access exclusive conferences with prominent industry speakers. More information at: https://talentarena.tech/ Mandatory registration.

check the website

AI has emerged as a powerful technology and it is expected it will impact all human activities and professional developments. Some deployments pose serious concern about its ethical implications. The course reviews some of the recommendations and guidelines published related with AI developments. Also, the main regulations and laws are examined. The course addresses the ethics of two main areas: using AI tools for research, and doing research in AI. Theoretical sessions are complemented with numerous examples and study cases.

10:00 - 13:00

This is a hackaton organized, among others, by FIB within the charity event organized every Christmas by the Catalan Television (TV3) called "La Marató": https://www.ccma.cat/tv3/marato/ For 2024, the topic for "La Marató" is respiratory diseases. Bitsxlamarato is a hakacton aimed at solving real challenges related to the topic proposed. Several challenges proposed by real oragnisms (hospitals, institutions, companies, etc.) are presented to the participants who must choose one of them and develop, during the three days, their computer science solution to it. You need to register via the official website. The website is updated (and registration is opened) every year, by mid-November, the latest.

2 full days (see website)

Our long-term strategy is to focus Novartis as a leading medicines company with five priorities: embrace operational excellence, deliver transformative innovation, go big on data and digital, build trust with society, and build a new culture by unleashing the power of our people. In order for us to develop new treatments, we have to invest our resources wisely. We believe that data science can help us here, and we believe that you can help us steer big data to uncover the best solution! On Thursday 28th November 2024 be ready to receive an exciting data science challenge on financial data. Our jury will look at your results as well as how innovative is your approach. This year it will be for three days (23 to 25 November) and online. For more information visit: https://godatathon.com/challenge/ Apply at: https://godatathon.com/apply-here/

Check the website (https://godatathon.com/apply-here/)

Lleidahack welcomes you to HackEPS 2024, the first hackathon in Lleida! The seventh edition of the HackEPS will take place in the building of the Superior Technical School of the University in Lleida on November 23 and 24, 2024. The participating students are expected to produce artefacts (solutions) at the level of, at least, master studies.

Saturday and Sunday whole day

A Datathon is a weekend-long competition where you are challenged to work on real-world business cases from different areas of Machine Learning, AI, and Data Science. You are given some datasets in order to answer questions or implement solutions Our event will take place physically in UPC's School of Mathematics and Statistics, located in Pau Gargallo 14, Barcelona! You can find a map here. You will have access to classrooms to work with your own laptop. We will provide you with WiFi. The event will start on Saturday November 11 at 9h, when we will present the challenges. You'll be able to work for 32 hours. The event will end on Sunday 17 at 17h, when the closing ceremony will take place. We will provide you with meals, WiFi and some nice swag. And of course, it's completely free!

Saturday and Sunday whole day

RISC-V is an open instruction set standard which is experiencing extraordinary growth all over the world in numerous areas of focus ranging from HPC & ML to the data center to embedded computing. The standardization activities are community driven by expert members (from industry, academia and individuals). BSC is one of the community members that is contributing to the ecosystem. This course is an opportunity to get familiar with technical aspects of the standard through a combination of lectures and hands-on sessions. This course identifies topics that are both fundamental to computer architecture and relevant to the design of RISC-V based solutions of the future. The emphasis is always on insights that will be useful to the (under)graduate student, whether he/she goes on for a PhD or joins a software or hardware development team. We will deal with principles, trade-offs, and implementation details related to the RISC-V standard. Along the course, the students will get familiar with some layers of the RISC-V software and hardware stacks using a learning-by-doing methodology. This will provide a mechanism to the students to understand the RISC-V ecosystem, BSC know-how and activities related to RISC-V, and explore the potential of the ISA to freely develop new technologies.. Topics will cover aspects like: how to boot an operating system, how to deploy a container and execute an application, how to tune an algorithm for improving its performance through the addition of custom instructions, and finally, how to improve the performance of an HPC application by taking advantage of the RISC-V Vector extension.

On October 21st and 22nd, UPC, BSC and Hyperion Research are organizing the International HPC User Forum: UPC Auditorium, Monday-Tuesday October 21st-22nd. There is no fee to attend this HPC User Forum event. Registration is required for seating, meal planning and name badge. The meeting is hold in the UPC Auditorium, in the Vertex Building, Monday Oct. 21th, 13:00 to 19:00, and Oct. 22nd, 8.30 to 15:30.

The objectives of this course are to understand the fundamental concepts supporting message-passing and shared memory programming models. The course covers the two widely used programming models: MPI for the distributed-memory environments, and OpenMP for the shared-memory architectures. The course also presents the main tools developed at BSC to get information and analyze the execution of parallel applications, Paraver and Extrae. It also presents the Parallware Assistant tool, which is able to automatically parallelize a large number of program structures, and provide hints to the programmer with respect to how to change the code to improve parallelization. It deals with debugging alternatives, including the use of GDB and Totalview. The use of OpenMP in conjunction with MPI to better exploit the shared-memory capabilities of current compute nodes in clustered architectures is also considered. Paraver will be used along the course as the tool to understand the behavior and performance of parallelized codes. The course is taught using formal lectures and practical/programming sessions to reinforce the key concepts and set up the compilation/execution environment.

All human activities have implications on our society. Research activity not only does but also the overall research system is based on trust. Then, responsible research conduct is of outmost importance. The goal of the course is to provide an overview of the rules and professional practices that are considered as responsible conduct of research and engineering. Ph. D. students, post-doctoral researchers and everybody involved in research and innovation must know the principles and practices that define a responsible conduct and the ones that are not appropriate and are identified as misconduct. Topics include: Introduction on Responsible Research and Innovation Research misconduct Authorship Plagiarism Peer reviews Conflicts of interest Mentor/mentee relationship Collaborative research Presenting the results Intellectual Property Information Privacy

Friday, 10:00-13:00

The 'Aula Lliure' project is designed so that early stage bachelor students can take advantage of the academic experience of more veteran students and thus improve their academic performance. The tuition language is catalan / spanish. Note: you must claim 1 ECTS when you teach 8 lectures (of 2h) to 1 group of students, for a total of 16h of lectures.

See the website

The 'Aula Lliure' project is designed so that early stage bachelor students can take advantage of the academic experience of more veteran students and thus improve their academic performance. The tuition language is catalan / spanish. Note: you can claim 2 ECTS when, at least, you teach 8 lectures (of 2h) to 2 groups of students, for a total of 32h of lectures.

See the website

Welcome to the 2024 ACM Summer School! This year's program focuses on High-Performance Computing (HPC) and Artificial Intelligence (AI), and it will also explore emerging research areas such as Quantum Computing. The 2024 ACM Summer School on "HPC Computer Architectures for AI and Dedicated Applications" will take place from 2 to 6 September in Barcelona, Spain. The Barcelona Supercomputing Center (BSC-CNS) and the Universitat Politècnica de Catalunya (UPC) will host the school.

9:00 - 20:00

High performance solutions play a key role in addressing environmental issues such as climate change, natural resource management, pollution control, greenhouse gas emissions, energy efficiency, and many others. This EUMaster4HPC Summer School has an excellent programme to train students capable of solving the world's biggest challenges. EUMAster4HPC Summer School 2023 offers students a unique opportunity to experience life as a EUMaster4HPC student.

8:00-20:00

This course identifies topics that are both fundamental to computer architecture and relevant to the design of microprocessors of the future. The emphasis is always on insights that will be useful to the graduate student, whether he/she goes on for a PhD or joins a microprocessor design team. We will deal with principles, tradeoffs, and implementation details. We will cover mechanism (e.g., trace caches, helper threads, branch prediction, bandwidth). We will discuss the implications of multi-core on future microprocessor design. We will examine current state of the art microprocessors. In addition to the class lectures/discussions, students will carry out an out-of-class project and make a presentation on what they learn to the class. There will be a written final examination that will be taken outside of class and turned in prior to the final class meeting.

15:00-19:00

Implementation of techniques to redirect participants when navigating in VR with the walk-in-place metaphor. When walking in place, users tend to slightly drift from their original position with the danger of colliding with the physical environment. In the research work, we are interested in testing different techniques to mitigate this problem. Upon completion, it could lead to a follow-up seminar with an additional 3 ECTS by running a user study and participating in a research publication.