Seminarios de Innovación e Investigación en Informática

The 'Aula Lliure' project is designed so that early stage bachelor students can take advantage of the academic experience of more veteran students and thus improve their academic performance. The tuition language is catalan / spanish. Note: you must claim 1 ECTS when you teach 8 lectures (of 2h) to 1 group of students, for a total of 16h of lectures.

See the website

The 'Aula Lliure' project is designed so that early stage bachelor students can take advantage of the academic experience of more veteran students and thus improve their academic performance. The tuition language is catalan / spanish. Note: you can claim 2 ECTS when, at least, you teach 8 lectures (of 2h) to 2 groups of students, for a total of 32h of lectures.

See the website

Weekly research seminar that presents the latest results in Computer Graphics and Visualization and projects developed by the ViRVIG Group.

10:30 - 11:30

Monthly research seminar held the first Wednesday of the month in room Omega S215 to present the latest results by members of the Department of Computer Science and visiting scientists.

12:00

All human activities have implications on our society. Professional exercise in engineering, being a researcher or running innovation projects imply making decisions that are not exclusively technical, they involve ethical considerations. Theoretical sessions are complemented with numerous examples and cases.

Friday, 10:00-13:00

Lleidahack welcomes you to HackEPS 2025, the first hackathon in Lleida! The seventh edition of the HackEPS will take place in the building of the Superior Technical School of the University in Lleida on November 22 and 23, 2025. The participating students are expected to produce artefacts (solutions) at the level of, at least, master studies.

Saturday and Sunday whole day

This is a hackaton organized, among others, by FIB within the charity event organized every Christmas by the Catalan Television (TV3) called "La Marató": https://www.ccma.cat/tv3/marato/ . The website is updated (and registration is opened) every year, by mid-November, the latest.

2 full days (see website)

COMPSs is a programming model which is able to exploit the inherent concurrency of sequential applications and execute them in a transparent manner to the application developer in distributed computing platform. This is achieved by annotating part of the codes as tasks, and building at execution a task-dependence graph based on the actual data used consumed/produced by the tasks. The COMPSs runtime is able to schedule the tasks in the computing nodes and take into account facts like data locality and the different nature of the computing nodes in case of heterogeneous platforms. Additionally, recently COMPSs has been enhanced with the possibility of coordinating Web Services as part of the applications. COMPSs supports Java, C/C++ and Python as programming languages.

The objective of this course is to learn how to use systems with more than one memory subsystem. We will see the different options on using systems equipped with Intel's Optane Persistent Memory technology, but also looking forward to upcoming systems with HBM and CXL memories.

The objective of this course is to present to potential users the new configuration of MareNostrum and a introduction on how to use the new system (batch system, compilers, hardware, MPI, etc). Also It will provide an introduction about RES infrastructures and how to get access to the supercomputing resources available.

The objective of this course is to learn how Paraver and Dimemas tools can be used to analyze the performance of parallel applications and to familiarize with the tools usage as well as instrumenting applications with Extrae.

The tutorial will motivate the audience on the need for portable, efficient programming models that put less pressure on program developers while still getting good performance for clusters and clusters with GPUs. More specifically, the tutorial will: Introduce the hybrid MPI/OmpSs parallel programming model for future exascale systems Demonstrate how to use MPI/OmpSs to incrementally parallelize/optimize: MPI applications on clusters of SMPs, and Leverage CUDA kernels with OmpSs on clusters of GPUs

This tutorial will introduce the audience to the BSC tools for heterogenous programming on FPGA devices. It describes OmpSs@FPGA, as a productive programming environment for compute systems with FPGAs.

The objective of this course is to explain the different components of MareNostrum 5 and to understand the design decisions taken. We also analyze how the system administration is taken in this pre-exascale system. Prerequisites: Experience on Linux system administration is required.

RISC-V is an open instruction set standard which is experiencing extraordinary growth all over the world in numerous areas of focus ranging from HPC & ML to the data center to embedded computing. The standardization activities are community driven by expert members (from industry, academia and individuals). BSC is one of the community members that is contributing to the ecosystem. This course is an opportunity to get familiar with technical aspects of the standard through a combination of lectures and hands-on sessions. This course identifies topics that are both fundamental to computer architecture and relevant to the design of RISC-V based solutions of the future. The emphasis is always on insights that will be useful to the (under)graduate student, whether he/she goes on for a PhD or joins a software or hardware development team. We will deal with principles, trade-offs, and implementation details related to the RISC-V standard. Along the course, the students will get familiar with some layers of the RISC-V software and hardware stacks using a learning-by-doing methodology. This will provide a mechanism to the students to understand the RISC-V ecosystem, BSC know-how and activities related to RISC-V, and explore the potential of the ISA to freely develop new technologies.. Topics will cover aspects like: how to boot an operating system, how to deploy a container and execute an application, how to tune an algorithm for improving its performance through the addition of custom instructions, and finally, how to improve the performance of an HPC application by taking advantage of the RISC-V Vector extension.

The objectives of this course are to understand the fundamental concepts supporting message-passing and shared memory programming models. The course covers the two widely used programming models: MPI for the distributed-memory environments, and OpenMP for the shared-memory architectures. The course also presents the main tools developed at BSC to get information and analyze the execution of parallel applications, Paraver and Extrae. It also presents the Parallware Assistant tool, which is able to automatically parallelize a large number of program structures, and provide hints to the programmer with respect to how to change the code to improve parallelization. It deals with debugging alternatives, including the use of GDB and Totalview. The use of OpenMP in conjunction with MPI to better exploit the shared-memory capabilities of current compute nodes in clustered architectures is also considered. Paraver will be used along the course as the tool to understand the behavior and performance of parallelized codes. The course is taught using formal lectures and practical/programming sessions to reinforce the key concepts and set up the compilation/execution environment.

All human activities have implications on our society. Research activity not only does but also the overall research system is based on trust. Then, responsible research conduct is of outmost importance. The goal of the course is to provide an overview of the rules and professional practices that are considered as responsible conduct of research and engineering. Ph. D. students, post-doctoral researchers and everybody involved in research and innovation must know the principles and practices that define a responsible conduct and the ones that are not appropriate and are identified as misconduct. Topics include: Introduction on Responsible Research and Innovation Research misconduct Authorship Plagiarism Peer reviews Conflicts of interest Mentor/mentee relationship Collaborative research Presenting the results Intellectual Property Information Privacy

Friday, 10:00-13:00

Middle East Technical University (METU), Ankara, Turkey: 14¿25 July 2025 The EUMaster4HPC Summer School 2025, entitled High Performance Computing for Specialised Applications, will be held at Middle East Technical University (METU) in Ankara, Turkey, from 14 to 25 July 2025. METU is a prestigious institution renowned for its excellence in science, engineering, and technology education and research. Located in the heart of Turkey's capital, its state-of-the-art facilities and vibrant academic community make it an ideal venue for this specialised programme. This summer school will cover the applications of HPC for specialised applications and innovative solutions related to Data Science, Modelling and Simulation, Chemistry, Aeronautics, Materials Science, Physics, and more. The summer school will focus on these applications and encourage further collaboration and integration among the participating students. The programme consists of three main parts: the academic programme, the industry programme, and the social programme.

8:00-20:00