This course offers a technology perspective into digital system design in the context nanoelectronic VLSI systems. The course includes a review CMOS logic circuits; impact of fabrication issues on the design of CMOS logic circuits; performance and power estimation; deep submicron design issues; ASIC design flow and low power design. This course is technology driven so future technologies will also be presented, analyzed and benchmarked.
Teachers
Person in charge
Ramon Canal Corretger (
)
Weekly hours
Theory
2
Problems
1
Laboratory
1
Guided learning
0
Autonomous learning
5.33
Contents
Introduction to MOS and VLSI Technology
Introduction to the technology used to build integrated circuits, historical perspective and future projections
CMOS Design
Fundamentals of VLSI MOS-based designs. Logic gates, logic styles and basic blocks.
VLSI Design Cycle
Presentation of the VLSI Design Stages, presentation of tools and workflow.
Thermal and Energy Analysis of Microprocessors
Methods and tools for thermal and energy Analysis of Microprocessors including memory, interconnect and system level modelling.
Design Implications of Temperature and Power
Presentation of the design implications of temperature and power, presentation of the most relevant compile-time and run-time techniques to control temperature and power.
Design for Reliability
Introduction to process, voltage and temperature variations, inter-die and intra-die variations. Transient errors and permanent faults.
Technology outlook
Introduction to future emerging technologies: late-cmos and post-cmos technologies
Teaching methodology
The main concepts of processor architecture will be introduced in the lectures. The students will complete their learning experience with the lab sessions where they will put in practice the concepts learned in the lectures.
Evaluation methodology
The course has two marks:
1) Essay/presentation (E)
2) The lab sessions (Lab)
The final mark will be computed as: 0,4 x Lab + 0,6 x E