Upcoming PATC courses in April 2018

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During April PATC will bring us three courses: "Systems Workshop: Programming MareNostrum 4", "Introduction to OpenACC" and "Introduction to CUDA Programming"

The objective of this course is to present to potential users the new configuration of MareNostrum and a introduction on how to use the new system (batch system, compilers, hardware, MPI, etc). Also It will provide an introduction about RES and PRACE infrastructures and how to get access to the supercomputing resources available.

Click here to register www.events.prace-ri.eu/event/646/registration/register#/register


This is an expansion of the topic "OpenACC and other approaches to GPU computing" covered on last years editions of the Introduction to CUDA Programming. This course is delivered by the GPU Center of Excellence (GCOE) awarded by NVIDIA to the Barcelona Supercomputing Center (BSC) in association with Universitat Politecnica de Catalunya (UPC). It will provide very good introduction to the PUMPS Summer School run jointly with NVIDIA - also at Campus Nord, Barcelona. 

As an NVIDIA GPU Center of Excellence, BSC and UPC are deeply involved in research and outreach activities around GPU Computing. OpenACC is a high-level, directive-based programming model for GPU computing. It is a very convenient language to leverage the GPU power with minimal code modifications, being the preferred option for non computer scientists. This course will cover the necessary topics to get started with GPU programming in OpenACC, as well as some advanced topics.

Click here to register www.events.prace-ri.eu/event/651/registration/register#/register


This course will provide very good introduction to the PUMPS Summer School run jointly with NVIDIA also at Campus Nord, Barcelona. 

The aim of this course is to provide students with knowledge and hands-on experience in developing applications software for processors with massively parallel computing resources. In general, we refer to a processor as massively parallel if it has the ability to complete more than 64 arithmetic operations per clock cycle. Many commercial offerings from NVIDIA, AMD, and Intel already offer such levels of concurrency. Effectively programming these processors will require in-depth knowledge about parallel programming principles, as well as the parallelism models, communication models, and resource limitations of these processors.

Click here to register www.events.prace-ri.eu/event/652/registration/register#/register