Ofertas de proyectos

Objectives:

- Understand the challenges of quantum communication for quantum computers.

- Develop new architectural methods to extend single-chip quantum computers to the multi-core paradigm.

- Model quantum interconnects within NetSquid, a simulator for quantum networks.

- Simulate different protocols for quantum communication within quantum computers.

Cybersecurity is becoming an increasingly important challenge for all companies and individuals alike. While big names used to be the main targets in the past, as people's lives move online, anyone is nowadays a potential target for any kind of cyber-attack, ranging from phishing to ransomware or serious privacy issues. In order to fight against those ever-evolving threats, Machine Learning is increasingly being used behind the scenes to design better systems that are able of self-learning to boost detection rates and boost overall resilience to unknown attacks. As AI-based solutions penetrate products across the industry, a new kind of threat that is often overlooked is becoming more and more prominent and dangerous: adversarial machine learning (AML).

AML focuses on designing specific inputs to deceive a previously trained Machine Learning models into misclassifying them for a specific purpose. One of the main flaws of any state-of-the-art Machine Learning or Deep Learning algorithms is that they assume that the nature of the data they receive is systematically benign, which is generally the case but does not hold true when an adversarial input is received. The motivation behind altering a ML model into thinking that, for example, a new sample is benign when in fact is malicious can range from pure research to more serious real-life issues such as an autonomous car wrongly classifying a stop sign (and thus provoking a fatal accident) or a wrongly diagnosed disease because of a slightly manipulated magnetic resonance image.

This problem is no exception for Cybersecurity where companies wrongly assume that once the last AI-based product is deployed in their network, their employees are safe...

Artificial Intelligence (AI) software is indisputable the key competitive advantage in every new computing system embedded in cars, planes, trains, and the like, providing a reach set of functionalities. AI-software in those systems must perform real-time processing of a massive amount of data coming from sensors like cameras and LiDARs. This requires the use of complex MPSoCs (Multi-Processor System on Chip) as main computing platform.  However, software's execution time when running on MPSoCs is hard to model accurately due to its complexity encompassing high-performance hardware like multi-level caches, complex CPUs and accelerators and distributed NoCs. Current practice for software timing analysis based on end-to-end execution time observations of tasks is not enough to master this complexity. Finer granularity metrics that break down execution time provides stronger evidence to increase the level of confidence on execution time estimates. Modern MPSoCs are equipped with Performance Monitoring Units (PMUs) and tracing facilities that do offer a promising baseline for this low-level analysis as they allow tracking hundreds of event monitors that capture in detail how the different applications in an MPSoC interact and affect each other's execution time. Yet, there is not a clear methodology to leverage PMU and tracing support which remain mostly unexplored terrain for timing analysis. 

For this TFG [1], we are looking for students wanting to work in the area of performance analysis of computing systems for AI-Based autonomous driving (AD) systems. In particular, the goal of the TFG is to perform performance analysis of modern embedded processors (e.g. NVIDIA Orin and Xilinx Zynq UltraScale processors) or architecture simulators of those processors. More in detail, we will assess some of the isolation mechanisms implemented in modern MPSoCs. Those mechanisms include cache partitioning and isolation in the access to main memory. These mechanisms are key to provide the required guaranteed performance.

• The first task is to precisely define the metrics that will be used to assess the average performance and guaranteed performance.
• The second task to define the configuration of the processor (e.g. cache partitioning, interconnect configuration, ...) under which the performance will be evaluated.
• The third task is to study the PMU in the target MPSoC and identify the set of hardware event monitors (HEMs) that will be used, and refine existing libraries to read them.
• The fourth task is to conduct an empirical evaluation with experiments on representative applications and analysis of the collected results.

The student will work in a multidisciplinary international team of the CAOS group at the BSC. The CAOS group comprise AI, GPU, computer architecture and operating system specialists [2].

[1] https://people.ac.upc.edu/fcazorla/archives/Project_Descriptions.pdf

[2] www.bsc.es/caos

Processor design is being democratized these days and even small companies and research centers can design and fabricate their test chips. This transition from a proprietary-only approach controlled by Intel, AMD, Arm, etc. to an open and collaborative environment, has been fostered by the emergence of the open RISC-V Instruction Set Architecture (ISA). Oppositely to x86 and ARM Instruction Set Architectures (ISAs), RISC-V emerges as an open source alternative attracting high attention from industry worldwide, but particularly European safety-relevant industry (automotive, space, avionics, robotics, etc.). RISC-V is becoming the new standard for hardware design as Linux became for operating systems in the past.

While some open source RISC-V processors are already available, they lack some hardware components (e.g., accelerators, monitoring units, etc.) so that they can be adopted by relevant industries (automotive, space, etc.). Extending those RISC-V processors with support for observability, controllability and AI acceleration is instrumental to get those processors adopted in safety-critical domains so that they can be guaranteed to deliver the performance needed reliably, and be tested easily against their corresponding safety requirements.

For this TFG [1], we are looking for students wanting to work in the area of processor design (Verilog, System Verilog, VHDL) for the automotive, space and avionics domains, using appropriate simulators and FPGAs. Those processors already include part of the hardware support needed to be adopted in safety-critical domains.

The candidate will evaluate those processors using industrially-relevant applications and benchmarks, and will enhance specific hardware components to increase performance (AI accelerators), test the processor (traffic injectors), and analyze its behavior (performance monitoring units). Such work will be conducted with a group of 6-8 engineers and students already skilled on the designs and tools to be used.

• TASK 1: Familiarize with the processor design environment, simulating the design, and run example benchmarks in a simulated environment.
• TASK 2: Generate a bitstream for the FPGA and reproduce simulated experiments on the FPGA.
• TASK 3: For a selected component (e.g., accelerator, traffic injector, etc. [2]) apply some enhancements to increase performance, statistics, etc.
• TASK 4: Evaluate relevant applications on the original and enhanced designs, and collect data validating the effectiveness of the enhancements.

The student will work in a multidisciplinary international team of the CAOS group at the BSC. The CAOS group comprises hardware designers, AI, computer architecture and operating system specialists [3].

[1] https://people.ac.upc.edu/fcazorla/archives/Project_Descriptions.pdf

[2] https://bsccaos.github.io/

[3] www.bsc.es/caos

This proposal explores a specific case of the simulation of weathering effects in computer graphics. Weathering refers to the process of deterioration and transformation that occurs on surfaces over time due to exposure to various environmental factors. In this project, the main focus will be on simulating and visualizing the growth of lichens on cultural heritage 3D models. Lichens are unique organisms that colonize surfaces and contribute to changes in the appearance and degradation of materials. This project aims to accurately model the growth patterns of lichens on the surface of the models and render the changes in the appearance of the materials in terms of color and/or shape. The project will involve implementing algorithms that simulate the growth of lichens based on environmental conditions and surface characteristics. The final outcome will be a visually compelling and scientifically accurate representation of the weathering process caused by lichens on cultural heritage 3D models, contributing to the preservation and conservation of these invaluable artifacts.

The last decade has witnessed a sudden breakthrough of Artificial Intelligence (AI) in the Automotive market. AI solutions have been increasingly deployed to provide advanced driving assistance solutions or even enable autonomous operation. Pedestrian detection, unintentional lane crossing monitoring, and Tesla AutoPilot are just few examples of this trend.

AI-based functionalities build on the capability of the underlying platform to timely process and manipulate a huge amount of data coming from sensors like cameras and LiDARs, to name a few. Sensor data processing involves a sequence or chain of functionalities before producing a result, which may consist in throwing a warning or triggering an action by sending a command to an actuator (e.g., speed reduction or breaking). The complexity emerging from the time-constrained interaction between modules is typically handled by relying on specialized middleware solutions, such as ROS2, CyberRT, or Autoware, to be executed on top of the automotive operating system.

In this scenario, functional correctness and timely behavior of the provided functionalities depends on a deep understanding of how the different software components are executed as a result of the combination of the middleware and operating system scheduler. However, this is a challenging endeavor and methods and tools are sought to monitor and analyze the set of autonomous driving functions at the middleware level. Based on the gathered knowledge, it is possible to guarantee the correct execution of the AI-based functionalities by tuning the middleware configuration to meet the functional and timing requirements.. 

For this TFG [1], we are looking for students wanting to work in the area of performance modeling and schedule optimization for AI-Based autonomous driving (AD) systems. In particular, the goal of the TFG is to analyze the execution of representative autonomous driving function on top of state-of-the-art automotive middleware framework performance (e.g. ROS2, CyberRT, Autoware). More in detail, we aim at define new methods and tools for assessing and subsequently optimizing the middleware configuration to meet the functional and timing requirements of AI-based autonomous driving functions. Our goals include the definition of novel metrics and profiling approaches for supporting the optimization process and assessing the proposed solution. guaranteed performance.

•    The first task is to familiarize with a reference autonomous-driving middleware solution (among ROS2, CyberRT, or Autoware)
• The second task  consists in understanding the interaction between the middleware and operating system layer in determining the system schedule
• The third task focuses on the identification of one or more relevant metrics that will be used (together with timing) to guide the optimization process
• The fourth task empirically assess the project outcomes with analysis and optimization of a representative autonomous driving setup (e.g., image recognition).

The student will work in a multidisciplinary international team of the CAOS group at the BSC. The CAOS group comprise AI, GPU, computer architecture and operating system specialists [2].

[1] https://people.ac.upc.edu/fcazorla/archives/Project_Descriptions.pdf

[2] www.bsc.es/caos