Teachers
Person in charge
- Adrià Armejach Sanosa ( adria.armejach@upc.edu )
Others
- Noelia Oliete Escuin ( noelia.oliete@upc.edu )
Weekly hours
Theory
2
Problems
1
Laboratory
1
Guided learning
0
Autonomous learning
6
Competences
Common technical competencies
- CT6.2 - To demonstrate knowledge, comprehension and capacity to evaluate the structure and architecture of computers, and the basic components that compound them.
- CT7.1 - To demonstrate knowledge about metrics of quality and be able to use them.
Autonomous learning
- G7.3 - Autonomous learning: capacity to plan and organize personal work. To apply the acquired knowledge when performing a task, in function of its suitability and importance, decide how to perform it and the needed time, and select the most adequate information sources. To identify the importance of establishing and maintaining contacts with students, teacher staff and professionals (networking). To identify information forums about ICT engineering, its advances and its impact in the society (IEEE, associations, etc.).
Computer engineering specialization
- CEC2.1 - To analyse, evaluate, select and configure hardware platforms for the development and execution of computer applications and services.
- CEC3.2 - To develop specific processors and embedded systems; to develop and optimize the software of these systems.
Objectives
-
Training to understand the basic concepts in multiprocessors: terminology, organization, elements of a Multiprocessor, consistency and coherence in memory.
Related competences: CEC2.1, CT6.2, G7.3, -
Training to understand the basic concepts of communication and synchronization in a multiprocessor.
Related competences: CEC2.1, CT6.2, G7.3, -
Training to understand the constraints imposed by technology, through the operation of ideal solutions adopted and implemented a multiprocessor.
Related competences: CEC3.2, CT6.2, -
Capacity to analyze and critically evaluate a multiprocessor and its elements.
Related competences: CEC2.1, CT7.1, CT6.2, -
Training for the use of a hardware description language and its application in the specification of elements of a Multiprocessor
Related competences: CEC3.2, CT7.1, CT6.2,
Contents
-
Motivation
Obstacles exist to exploit the parallelism at the level of instruction. Increased productivity of a multithreaded processor using the technique. Use the available number of transistors on a chip using the technique of replication of processors. -
Consistency and coherence of memory
Concepts of memory consistency and cache coherency. Memory model specified in the machine language. Need to maintain consistency among copies of data. -
Multiprocessor core
Elements of a multiprocessor system. Private Cache. Interconnection Network: Support for a model of consistency. Coherence cache. -
Communication and synchronization
Support the machine language for communication and synchronization. Basic mechanisms of synchronization. -
Small-scale multiprocessor
Increased performance. Reduction of bandwidth required. Cache.Multiprocesador coherence protocols on a chip. -
Scalable multiprocessor
Implications of the number of processors in a multiprocessor architecture. Interconnection of several chip multiprocessor.
Activities
Activity Evaluation act
Teaching methodology
Classes theory in which concepts are developed and there is student participation.Classes of problems which apply the concepts developed in the theory classes and is an active student.
Laboratory classes in which to apply the concepts developed in theory class a concrete example of multiprocessor. The active agent is pupils and collaboration between elements of the group is the means to increase and consolidate knowledge.
The course is developed constructively. In other words, is part of the concepts learned in previous courses in each subject and the subject of increased knowledge and ability to understand, analyze and reason about aspects of a multiprocessor. This training is more quantitative.
Evaluation methodology
Proof (P): Written test which evaluated the goal for the first three issues.Final exam (F): Written test which evaluated all the objectives of the course.
Laboratory (L) is evaluated based on reports submitted in each of the sessions and, if appropriate, a personal interview.
The final (NF) is calculated using the following expression:
NF = max (0.8 x F (0.65 x F + 0.15 P)) + 0.2 x L
The level of achievement of generic competition evaluated indirectly from the notes of evidence and the final exam.
The corresponding note is:
A if 8.5 =< NF; B if 7 =< NF < 8.5; C if 5 =< NF < 7; D if NF < 5
Bibliography
Basic
-
Parallel computer architecture: a hardware/software approach
- Culler, D.E.; Singh, J.P.; Gupta, A,
Morgan Kaufmann Publishers,
1999.
ISBN: 1-55860-343-3
https://discovery.upc.edu/discovery/fulldisplay?docid=alma991001862689706711&context=L&vid=34CSUC_UPC:VU1&lang=ca -
LogicWorks 5: interactive circuit design software
- Capilano Computing Systems,
Prentice Hall,
2004.
ISBN: 9780131456587
https://discovery.upc.edu/discovery/fulldisplay?docid=alma991002692839706711&context=L&vid=34CSUC_UPC:VU1&lang=ca