This course offers a more advanced treatment of digital design in the context of microprocessors. Students are introduced to a design methodology which encompasses the range from architectural and logic models to system simulations. The course includes the design flow: logic synthesis, placement and routing; design verification; computer-aided digital system modeling, performance and power estimation, and design implementation with field programmable gate arrays. Alternative implementations (ASICs, PLAs) will also be discussed.
Teachers
Person in charge
Roger Espasa Sans (
)
Others
Leonidas Kosmidis (
)
Ramon Canal Corretger (
)
Weekly hours
Theory
2
Problems
0
Laboratory
2
Guided learning
0
Autonomous learning
5.33
Competences
Technical Competences of each Specialization
High performance computing
CEE4.1 - Capability to analyze, evaluate and design computers and to propose new techniques for improvement in its architecture.
Generic Technical Competences
Generic
CG1 - Capability to apply the scientific method to study and analyse of phenomena and systems in any area of Computer Science, and in the conception, design and implementation of innovative and original solutions.
Transversal Competences
Teamwork
CTR3 - Capacity of being able to work as a team member, either as a regular member or performing directive activities, in order to help the development of projects in a pragmatic manner and with sense of responsibility; capability to take into account the available resources.
Reasoning
CTR6 - Capacity for critical, logical and mathematical reasoning. Capability to solve problems in their area of study. Capacity for abstraction: the capability to create and use models that reflect real situations. Capability to design and implement simple experiments, and analyze and interpret their results. Capacity for analysis, synthesis and evaluation.
Basic
CB6 - Ability to apply the acquired knowledge and capacity for solving problems in new or unknown environments within broader (or multidisciplinary) contexts related to their area of study.
Objectives
To understand and implement a simple pipelined processor.
Related competences:
CG1,
CEE4.1,
CB6,
CTR3,
CTR6,
To program skillfully in a hardware description language
Related competences:
CB6,
CTR6,
To understand the intricacies of advanced microprocessor structures such as the memory hierarchy, branch prediction, out-of-order execution and multithreading (among other).
Related competences:
CG1,
CEE4.1,
CB6,
CTR6,
Contents
Historical Perspective
Description of how processor design has evolved through the technology changes from mechanical devices to the current FinFET transistors.
Technology-Aware Processor Design
Introduction to the quantification and evaluation of technology-related metrics such as area, power and timing.
Processor Design Cycle and Fabrication
Description of the VLSI Design stages including an introduction to placement and routing techniques.
Memory Hierarchy
Introduction to the efficient construction of on-chip memory structures. Design choices. Performance and power consumption.
Modern Processor Architectures
Description and implementation of state-of-the-art processor architectures such as superscalar, multithreading or chip-multiprocessors
Activities
ActivityEvaluation act
Design and Simulation Tools
First contact with the circuit design and simulation tools. Introduction to the basic functionalities and components needed to implement a simple microprocessor. Objectives:12
Theory
0h
Problems
0h
Laboratory
0h
Guided learning
0h
Autonomous learning
0h
Teaching methodology
The main concepts of processor architecture will be introduced in the lectures. In the interactive problem-solving classes the students will participate into applying the concepts learned into real world designs. Finally, the students will complete their learning experience with the lab sessions where they will put in practice the concepts learned in the lectures and applied in the problem-solving classes.
Evaluation methodology
The course has three marks:
1) Lab sessions (Lab)
2) Presentation of a research topic (T)
The final mark will be computed as: 0,8 x Lab + 0,2 T