Credits
6
Types
Specialization complementary (Computer Engineering)
Requirements
- Prerequisite: AC
Department
AC
Web
http://docencia.ac.upc.edu/FIB/grau/VLSI
Teachers
Person in charge
- Jesus Sanchez Navarro ( f.jesus.sanchez@upc.edu )
Weekly hours
Theory
2
Problems
0
Laboratory
2
Guided learning
0
Autonomous learning
6
Competences
Common technical competencies
- CT6.2 - To demonstrate knowledge, comprehension and capacity to evaluate the structure and architecture of computers, and the basic components that compound them.
Sustainability and social commitment
- G2.3 - To take into account the social, economical and environmental dimensions, and the privacy right when applying solutions and carry out project which will be coherent with the human development and sustainability.
Computer engineering specialization
- CEC1.1 - To design a system based on microprocessor/microcontroller.
- CEC1.2 - To design/configure an integrated circuit using the adequate software tools.
- CEC2.1 - To analyse, evaluate, select and configure hardware platforms for the development and execution of computer applications and services.
- CEC2.2 - To program taking into account the hardware architecture, using assembly language as well as high-level programming languages.
- CEC2.3 - To develop and analyse software for systems based on microprocessors and its interfaces with users and other devices.
- CEC3.2 - To develop specific processors and embedded systems; to develop and optimize the software of these systems.
Objectives
-
Understand the steps of VLSI circuit design. Get to know the tools available at each point.
Related competences: CEC1.1, CEC1.2, -
Evaluate the VLSI circuits according to a set of figures of merit which include the economic and environmental evaluation
Related competences: CEC1.2, G2.3, -
Get to know Hardware Description Languages. Be able to program simple structures in one of them
Related competences: CEC1.2, G2.3, -
Understand hardware design specifications, develop a testbench, execute it, and be able to find errors in the design code.
Related competences: CEC2.3, CEC3.2, CT6.2, CEC2.2, -
Present a verification plan in public and the results of its execution. Be able to conclude the verification of a hardware block.
Related competences: CEC2.1, G4.3,
Contents
-
Course description
Introduction. Objectives. Phases in the development of a processor. -
Introduction to VLSI design at the CMOS transistor level
Description of the stages and tools used in VLSI design, from system specification to implementation in an integrated circuit. -
The standard cell
Designing with standard CMOS cells: principles, layout, and optimization for digital circuits. -
Introduction to pre-silicon verification
What is pre-silicon verification? Relationship between design and verification. Types and objectives of verification. Simulation environment and tools. -
Verification planning and testbenches
Basic structure and components of a testbench. Verification plan. Types of stimuli. -
SystemVerilog for verification
Introduction to SystemVerilog for verification. Data types. Classes and inheritance. DPI. -
Assertions and functional coverage
Types of assertions. SVA. Functional coverage. -
Introduction to UVM (Universal Verification Methodology)
Why UVM? Components of a UVM testbench. Configuration and integration. -
Advanced UVM and practical applications
Sequences. UVM factory. Best practices and design patterns. -
Processor verification
Challenges at different pipeline stages. ISA verification. Cache coherence verification. Performance and power verification. -
Formal verification
What is formal verification? Assertions as a formal basis. Limits and advantages of the method. -
Debug, coverage, and trends
Debugging strategies. How to read and close functional coverage. Continuous verification. -
Introduction to post-silicon validation
How errors are detected and resolved in real hardware. Tools and methodologies.
Activities
Activity Evaluation act
Theory
4h
Problems
0h
Laboratory
0h
Guided learning
0h
Autonomous learning
12h
Teaching methodology
The theory classes will cover the previously mentioned content, one topic per week, using slides (which will be shared with students). Student participation and engagement in class will be valued.In the lab sessions, the concepts covered in theory will be applied, learning hands-on how to use EDA tools to design and/or verify hardware blocks commonly found in a modern microprocessor.
The course follows a constructive approach. That is, it builds on the concepts acquired in previous subjects, and with each topic, the student¿s knowledge and skills are progressively expanded.
Evaluation methodology
There are 2 components:- Laboratory (L): lab grade, calculated based on each of the submissions.
- Presentation (P): individual oral presentation on a complete verification project.
The final grade will be calculated as: NF = 0.4 × L + 0.6 × P
The level of achievement of the generic competence is assessed indirectly through the lab grades and oral presentation. The corresponding mark is:
A if 8.5 <= NF; B if 7 <= NF < 8.5; C if 5 <= NF < 7; D if NF < 5
Bibliography
Basic
-
CMOS VLSI design: a circuits and systems perspective
- Weste, N. H.E.; Harris, D.M,
Addison Wesley,
2011.
ISBN: 9780321547743
https://discovery.upc.edu/discovery/fulldisplay?docid=alma991003760429706711&context=L&vid=34CSUC_UPC:VU1&lang=ca -
SystemVerilog for Verification: A Guide to Learning the Testbench Language Features
- Spear, Chris ; Tumbush, Greg,
Springer Nature,
2012.
ISBN: 9781461407157
https://link-springer-com.recursos.biblioteca.upc.edu/book/10.1007/978-1-4614-0715-7 -
The UVM primer : an introduction to the Universal Verification Methodology
- Salemi, Ray,
Boston Light Press,
2013.
ISBN: 9780974164939
https://discovery.upc.edu/discovery/fulldisplay?docid=alma991005224879506711&context=L&vid=34CSUC_UPC:VU1&lang=ca
Complementary
-
Digital integrated circuits: a design perspective
- Rabaey, J.M.; Chandrakasan, A.P.; Nikolic, B,
Pearson Education,
2003.
ISBN: 0130909963
https://discovery.upc.edu/discovery/fulldisplay?docid=alma991002540039706711&context=L&vid=34CSUC_UPC:VU1&lang=ca