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Processor Verification

Credits
6
Types
Specialization complementary (High Performance Computing)
Requirements
This subject has not requirements , but it has got previous capacities
Department
AC
Web
https://docencia.ac.upc.edu/master/MIRI/PV
Upon successful completion of this course, students will be able to understand the critical role of pre-silicon verification in modern microprocessor design. They will be able to identify and apply various verification methodologies and techniques as well as utilize simulation tools to debug and analyze design behavior. Throughout the course students will develop test plans and create effective testbenches using hardware description languages and
verification languages.

Teachers

Person in charge

Weekly hours

Theory
2
Problems
0
Laboratory
2
Guided learning
0
Autonomous learning
7.11

Competences

High performance computing

  • CEE4.1 - Capability to analyze, evaluate and design computers and to propose new techniques for improvement in its architecture.
  • Generic

  • CG4 - Capacity for general and technical management of research, development and innovation projects, in companies and technology centers in the field of Informatics Engineering.
  • Teamwork

  • CTR3 - Capacity of being able to work as a team member, either as a regular member or performing directive activities, in order to help the development of projects in a pragmatic manner and with sense of responsibility; capability to take into account the available resources.
  • Appropiate attitude towards work

  • CTR5 - Capability to be motivated by professional achievement and to face new challenges, to have a broad vision of the possibilities of a career in the field of informatics engineering. Capability to be motivated by quality and continuous improvement, and to act strictly on professional development. Capability to adapt to technological or organizational changes. Capacity for working in absence of information and/or with time and/or resources constraints.
  • Basic

  • CB7 - Ability to integrate knowledges and handle the complexity of making judgments based on information which, being incomplete or limited, includes considerations on social and ethical responsibilities linked to the application of their knowledge and judgments.
  • CB8 - Capability to communicate their conclusions, and the knowledge and rationale underpinning these, to both skilled and unskilled public in a clear and unambiguous way.
  • Objectives

    1. To understand and implement a verification plan and a testbench, and execute it.
      Related competences: CG4, CEE4.1, CB7, CTR3,
    2. To be able to provide and defend the verification plan and its execution phases.
      Related competences: CB8, CTR3, CTR5,
    3. To use the EDA tools required to accomplish the project.
      Related competences: CB7, CTR5,

    Contents

    1. Introduction to pre-silicon verification
      Why verification is critical in modern design. Overview of the verification flow. The role of
      verification in microprocessor design.
    2. Verification planning and testbenches
      Verification plan and coverage goals. Testbench architecture. Monitors, checkers, and scoreboards.
    3. SystemVerilog for verification (SVV)
      SystemVerilog basics for testbench design. Interfaces and clocking blocks. Randomization and constraints. Classes, inheritance, polymorphism. Transactions (TLM).
    4. Directed and randomized tests
      Directed test methodologies. Randomized test generation. Test coverage analysis. Debugging strategies. Stimulus variation. Predictability vs. randomness. Constraints in test generation.
    5. Assertions and functional coverage
      Immediate vs. concurrent assertions. SVA (SystemVerilog Assertions) syntax and
      examples. Functional coverage vs. code coverage. Coverage-driven verification.
    6. Introduction to UVM (Universal Verification Methodology)
      UVM goals and structure. UVM components. Factory, configuration, and objection mechanisms.
    7. UVM testbenches and sequencing
      UVM test phases and flow. Sequences and sequence items. Building reusable tests. Debugging and simulation output.
    8. Processor-specific verification challenges
      Verifying CPU pipelines and control logic. Instruction-level and architectural verification. Handling interrupts, exceptions, and hazards. ISA compliance testing.
    9. Formal verification techniques
      Model checking and theorem proving overview. Equivalence checking. Bounded model
      checking. Use cases and limitations in microprocessor design.
    10. Performance and power verification
      Power-aware simulation concepts. Functional vs. low-power states. Performance modeling.
    11. Debug strategies and coverage closure
      Interpreting functional/code coverage reports. Optimizing tests for coverage. Debugging techniques and waveform analysis.
    12. Trends and real-case studies
      Latest trends in verification (RISC-V, ML-driven verification, formal tools). Review of real CPU verification case studies.
    13. Introduction to post-silicon validation
      How errors are detected and fixed in real hardware. Tools and methodologies.

    Activities

    Activity Evaluation act


    Introduction to pre-silicon verification


    Objectives: 1
    Contents:
    Theory
    3h
    Problems
    0h
    Laboratory
    3.4h
    Guided learning
    0h
    Autonomous learning
    4h

    Theory
    8h
    Problems
    0h
    Laboratory
    16.9h
    Guided learning
    0h
    Autonomous learning
    28h

    Theory
    6h
    Problems
    0h
    Laboratory
    3.4h
    Guided learning
    0h
    Autonomous learning
    24h

    Theory
    6h
    Problems
    0h
    Laboratory
    3.3h
    Guided learning
    0h
    Autonomous learning
    24h

    Industry trends and post-silicon validation


    Objectives: 1
    Contents:
    Theory
    4h
    Problems
    0h
    Laboratory
    0h
    Guided learning
    0h
    Autonomous learning
    4h

    Verification project


    Objectives: 1 2 3
    Week: 13 (Outside class hours)
    Theory
    0h
    Problems
    0h
    Laboratory
    0h
    Guided learning
    0h
    Autonomous learning
    0h

    Teaching methodology

    The main concepts of processor pre-silicon verification will be introduced in the lectures. The students will complete their learning experience with the lab sessions where they will put into practice the concepts learned in the lectures.

    Evaluation methodology

    The course has two marks:
    1) The lab sessions (L)
    2) Presentation of a verification project (P)

    The final mark will be computed as: 0,4 x L + 0,6 x P

    Bibliography

    Basic

    Previous capacities

    Concepts of digital circuit design.
    Hardware description languages (HDL).
    Programming and scripting.
    Principles of computer architecture.