Abstract:
Future parallel processors will be heterogeneous, be increasingly less reliable, and operate in dynamically changing operating conditions. This will result in a constantly varying pool of hardware resources which can greatly complicate the task of efficiently exposing a program's parallelism onto these resources. Coupled with this uncertainty is the diverse set of efficiency metrics that users may desire.
This talk will describe Varuna, a system that dynamically, continuously, rapidly and transparently adapts a program's parallelism to best match the instantaneous capabilities of the hardware resources while satisfying different efficiency metrics. Varuna is applicable to both multithreaded and task-based programs and can be seamlessly inserted between the program and the operating system without needing to change the source code of either.The talk will also present results demonstrating Varuna's effectiveness in diverse execution environments using unaltered C/C++ parallel programs from various benchmark suites.

Biography:
Guri Sohi has been a faculty member at the University of Wisconsin-Madison since 1985 where he currently a Vils Research Professor, the John P. Morgridge Professor and the E. David Cronon Professor of Computer Sciences. He was the Chair of the Computer Sciences Department from 2004 until 2008.

Sohi's research has been in the design of high-performance microprocessors and computer systems. Results from his research can be found in almost every high-end microprocessor in the market today.

He received the 1999 ACM SIGARCH Maurice Wilkes award "for seminal contributions in the areas of high issue rate processors and instruction level parallelism" and the 2011 ACM/IEEE Eckert-Mauchly Award "for pioneering widely used micro-architectural techniques for instruction-level parallelism". At the University of Wisconsin he was selected as a Vilas Associate in 1997, awarded the WARF Kellett Mid-Career Faculty Researcher award in 2000, and was selected as a WARF Named Professor in 2007. He is a Fellow of both the ACM and the IEEE and was elected to the National Academy of Engineering in 2009.