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Evolution, potentials and current challenges of reconfigurable computing

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Introducida: 31-10-2013
-Speaker: Walid Najjar (Department of Computer Science & Engineering (University of California Riverside))
-Date: Tue, 12/Nov/2013, 11:00
-Room: C6-E101
ABSTRACT

Reconfigurable computing is often seen as a third computing paradigm, along with ASICS and Software. It is not a new idea.

In fact, the basic ideas behind reconfigurable computing date back to the very early computers. The very first "modern" reconfigurable computing system was developed 25 years ago: the DEC PRL Programmable Active Memory (PAM). Two factors have contributed to the rekindling of interest in this paradigm: the rapid growth in both size and speed of its underlying technology (FPGA devices) and the change in the challenging problems: processing big data at line speed. These challenging problems have spurred researchers to examine reconfigurable computing solutions to problems far beyond its initial niche of signal and image processing: bioinformatics, data mining, data analytics, data bases etc. Customized hardware multithreading is an architecture model, implemented on FPGAs, that supports large-scale parallelism by masking long memory latency; it is supported by the availability of hybrid architecture, seamlessly combining CPUs and FPGAs with large shared virtual memory (the Convey HC and MX series). As with any new paradigm, reconfigurable computing raises new challenges in architecture, compilers, languages and algorithms.

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